The needs of a multitasking/multiuse operating system include environment preservation during task switches, operating system and user protection, and virtual memory management. The Intel 80286 was the first 8086 family processor designed to make implementation of these features relatively easy. The 80286 was used as the CPU the IBM PC/AT and its clones, the IBM AS/2 Model 50, and in the IBM AS/I . As you can see in the block diagram in Figure 5. 2, an 80286 contains four separate processing units.
The bus unit (BOO) in the device performs all memory and 1/0 reads and writes, refreshes instruction bytes, and controls transfer of data to and from processor extension devices such as the 80287 math coprocessor. The instruction unit (10) fully decodes up to three farfetched instructions and holds them in a queue, where the execution unit can access them. This is a further example of how modern processors keep several instructions “in the pipeline” instead of waiting to finish one instruction before fetching the next. The execution unit (ELI) uses its 16-bit ALL to execute instructions it receives from the instruction unit.
When operating in its real address mode, the 80286 register set is the same as that of an 8086 except for the addition of a 16-bit machine status word (MS) register. The address unit (AU) computes the physical addresses that will be sent out to memory or 1/0 by the BUY. The 80286 can operate in one of two memory address modes, real address mode or protected virtual address mode. If the 80286 is operating in the real address mode, the address unit computes addresses using a segment base and an offset Just as the 8086 does.
The familiar CSS, ADS, AS, and SEES sisters are used to hold the base addressed for the segments currently in use. The maximum physical address space in this mode is 1 Maybe, Just as it is for the 8086. If an 80286 is operating in its protected virtual address mode, the address unit functions as a complete MUM. In this address mode the 80286 uses all 24 address lines to access up to 16 Maybes or physical memory. In protected mode it also provides up to a gigabyte of virtual; memory using the descriptor table scheme shown in figure 5. 3. Figure 5. 4 shows the 68-pin package that is usually used for an 80286.
The 80286 has a 16-bit data bus and a 24-bit multiplexed address bus. The 24-bit address bus allows the processor to access 16 Maybes of physical memory when operating in protected mode. Memory hardware for the 80286 is set up as an odd bank and an even bank, Just as it is for the 8086. The even bank will be enabled when BEE is low. To access an aligned word, both AY and BEE will be low. External buffers are used on both the address and the data bus. From a control standpoint, the 80286 functions similarly to an 8086 operating in maximum mode.
